docs/design-plans · or1-design · Tangled

nonbinary.computer / or1-design

OR-1 dataflow CPU sketch

or1-design docs design-plans

10 files

Orual · feat: implement frame matching lanes for concurrent PE matching · 7mo ago

2026-02-22-or1-asm.md

feat: implement OR1 assembler (parse → lower → resolve → place → allocate → codegen)

2026-02-22-or1-emu.md

init plus plans

2026-02-23-dataflow-renderer.md

docs: add dataflow graph renderer design plan

2026-02-23-dfasm-syntax-hl.md

add editor syntax highlighting for dfasm

2026-02-26-or1-monitor.md

docs: add OR1 Monitor design plan

2026-02-26-token-migration.md

docs: add token format migration design plan

2026-02-27-cycle-timing.md

docs: add cycle-accurate timing design plan

2026-02-28-dfasm-macros.md

docs: add dfasm macros and function calls design plan

2026-03-06-pe-frame-redesign.md

feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set

2026-03-07-frame-lanes.md

feat: implement frame matching lanes for concurrent PE matching