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or1-design
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OR-1 dataflow CPU sketch
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Overview
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or1-design
/
asm
13 files
at
main
Orual
·
feat: implement frame matching lanes for concurrent PE matching
·
6mo ago
264195f0
__init__.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
allocate.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
builtins.py
fixes and grammar updates
7mo ago
CLAUDE.md
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
codegen.py
feat: implement frame matching lanes for concurrent PE matching
6mo ago
errors.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
expand.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
ir.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
lower.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
opcodes.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
place.py
feat: rewrite ProcessingElement with frame-based matching, output routing, and unified instruction set
6mo ago
resolve.py
feat: implement OR1 assembler (parse → lower → resolve → place → allocate → codegen)
7mo ago
serialize.py
feat(asm): implement macro system, function calls, and ${param} substitution
7mo ago
