alpha
Login
Join now
nonbinary.computer
/
or1-design
Star
Starred
Star
Something went wrong. Try again.
Fork
0
Eye filled
Watch
Watching
Watch
OR-1 dataflow CPU sketch
Star
Starred
Star
Something went wrong. Try again.
Fork
0
Eye filled
Watch
Watching
Watch
Overview
Overview
Issues
Issues
Pulls
Pulls
Pipelines
Pipelines
or1-design
/
docs
4 folders
·
4 files
at commit
5bbf02f7
Orual
·
docs: add test plan for PE frame-based redesign
·
6mo ago
f8ad84fc
design-plans
docs: add unified PE frame-based redesign design plan
6mo ago
implementation-plans
feat: add Instruction, OutputStyle, FrameDest, TokenKind, FrameOp; renumber all opcodes to 5-bit hardware encoding; remove ALUInst, SMInst, Addr, FREE_CTX
6mo ago
plans
bugfixes in monitor and graph renderer, improvements to SM visibility
7mo ago
test-plans
docs: add test plan for PE frame-based redesign
6mo ago
assembler-redesign-plan.md
docs: add unified PE frame-based redesign design plan
6mo ago
emulator-redesign-plan.md
docs: add unified PE frame-based redesign design plan
6mo ago
macro-enhancements.md
updating docs
6mo ago
test-requirements.md
fix(asm): address code review issues — invalid port errors, @ret leak, test gaps
6mo ago
